AI Silicon, Physical Design Engineer
About this role
Unconventional, Inc. faces a severe industry hurdle as the surging demand for AI computation hits global energy limits. To address this, the hardware team is rebuilding computing foundations by mapping neural networks directly to device physics rather than relying on inefficient software abstractions.
As a foundational Member of Technical Staff in Physical Design, this engineer drives the back-end realization of custom silicon from register-transfer level to final layout. The person in this seat manages complex block implementation, aggressive power and performance goals, and physical sign-off tasks.
Ideal candidates bring deep semiconductor industry experience and thrive on multidisciplinary R&D challenges. A track record of successful tapeouts on advanced process nodes ensures the technical readiness required for this role.
What you will do
- Lead the complete physical implementation of complex digital blocks and top-level system-on-chip integration, including floorplanning and routing.
- Drive aggressive power, performance, and area optimization targets alongside architects to improve routability.
- Manage the final sign-off process through static timing analysis, IR drop evaluation, and physical verification checks.
- Contribute to flow automation and set best practices for logic synthesis and formal verification.
- Collaborate across digital and analog domains to integrate custom mixed-signal blocks into the digital fabric.
- Evaluate prospective partner tools that can enhance overall chip design efficiency.
What you need
- Hold a Bachelor of Science or Master of Science degree in Electrical Engineering, Computer Engineering, or a related technical field.
- Accumulate at least 10 years of professional industry experience in digital physical design with documented tapeout successes.
- Demonstrate expertise in static timing analysis and timing closure methodologies for high-frequency architectures.
- Apply a deep understanding of physical design challenges specific to advanced semiconductor nodes.
- Master standard electronic design automation tool suites such as Synopsys Fusion Compiler or Cadence Innovus.
- Write effective automation scripts using Tcl, Python, or Perl to streamline design workflows.
Nice to have
- Experience with physical design for machine learning accelerators or large-scale systolic arrays
- Experience with top-level integration of custom analog macros and complex power-sequencing requirements
- Hands-on experience with multi-voltage domains, UPF/CPF flows, and advanced power-gating techniques
- Familiarity with state-of-the-art AI tools used to accelerate chip design
Benefits
- Best-in-class health benefits
- 401k matching
- Truly unlimited PTO
- Complimentary meals in the Mountain View office
Skills and tech stack
Questions candidates ask
What is the work location policy for this role?
The role is based out of Mountain View, CA with remote options available.
What core technical background is required?
Candidates need 10+ years of industry experience in digital physical design with a track record of successful tapeouts on modern process nodes, along with a B.S. or M.S. in Electrical Engineering or Computer Engineering.
What tools and languages will I use daily?
Daily work involves standard EDA tool suites like Synopsys Fusion Compiler or Cadence Innovus, alongside scripting languages such as Tcl, Python, or Perl.
What perks are provided to employees?
The package includes best-in-class health benefits, 401k matching, truly unlimited PTO, and complimentary meals in the Mountain View office.
The application is on the official Unconventional, Inc. careers page.
Apply on company site